Mar 23, 2026

Hidden in Plain Sight: Representational Adversarial Steganography in Colluding LLMs

Vainateya Rangaraju, Srujana Medicherla, Denis Lim, Guillaume Zahnd, Anna Konovalenko, Igor Pereverzev

We investigate whether Large Language Models (LLMs) can develop representational steganography: the ability to encode and transmit hidden signals within internal representations that are not readily detectable by oversight mechanisms. We apply this to the threat models of deception and collusion in multi-agent settings. We show that this capability emerges under adversarial pressure, and discuss the robustness of our experiments, and what they might show for existing machine oversight regimes.

Reviewer's Comments

Reviewer's Comments

Arrow
Arrow
Arrow

A well-presented, technical implementation and exploration of steganography in a shared-activation space situation. The rank-8 constraint is a smart bottleneck. I thought the figures were very useful.

The motivation of this felt like the notable weak point. Current multi-agent systems communicate through text and not through shared residual streams, so the practical relevance of this threat model isn't clear to me. This ultimately detracted from the underlying idea and the work - which I think were both quite good. Also, this result required deliberate trial-and-error training pressure, and did not arise spontaneously, which makes this a less pressing safety concern.

I still think there are fruitful areas to explore here, if you wanted to take this further. There may be an argument to be made about multi-headed or mixture-of-experts architectures where components do share internal representations, and whether selection pressures in those settings could produce something analogous to your training dynamics. I'd be interested in your take on that!

Interesting work on representational steganography for multi-agent control. But I have two main concerns:

1. The threat model: it's not clear why two agents in the wild would share representations through an explicit latent channel; real multi-agent communication happens via text/APIs, so the setup feels contrived

2. The evaluation - the key claim is that communication survives adversarial pressure from the monitor, but the available results mostly show Experiment 1 (communication without evasion), and ROC/safety curves would have been much more interpretable than point accuracies for telling the safety story about monitor evasion tradeoffs.

Cite this work

@misc {

title={

(HckPrj) Hidden in Plain Sight: Representational Adversarial Steganography in Colluding LLMs

},

author={

Vainateya Rangaraju, Srujana Medicherla, Denis Lim, Guillaume Zahnd, Anna Konovalenko, Igor Pereverzev

},

date={

3/23/26

},

organization={Apart Research},

note={Research submission to the research sprint hosted by Apart.},

howpublished={https://apartresearch.com}

}

Recent Projects

Feb 2, 2026

Markov Chain Lock Watermarking: Provably Secure Authentication for LLM Outputs

We present Markov Chain Lock (MCL) watermarking, a cryptographically secure framework for authenticating LLM outputs. MCL constrains token generation to follow a secret Markov chain over SHA-256 vocabulary partitions. Using doubly stochastic transition matrices, we prove four theoretical guarantees: (1) exponentially decaying false positive rates via Hoeffding bounds, (2) graceful degradation under adversarial modification with closed-form expected scores, (3) information-theoretic security without key access, and (4) bounded quality loss via KL divergence. Experiments on 173 Wikipedia prompts using Llama-3.2-3B demonstrate that the optimal 7-state soft cycle configuration achieves 100\% detection, 0\% FPR, and perplexity 4.20. Robustness testing confirms detection above 96\% even with 30\% word replacement. The framework enables $O(n)$ model-free detection, addressing EU AI Act Article 50 requirements. Code available at \url{https://github.com/ChenghengLi/MCLW}

Read More

Feb 2, 2026

Prototyping an Embedded Off-Switch for AI Compute

This project prototypes an embedded off-switch for AI accelerators. The security block requires periodic cryptographic authorization to operate: the chip generates a nonce, an external authority signs it, and the chip verifies the signature before granting time-limited permission. Without valid authorization, outputs are gated to zero. The design was implemented in HardCaml and validated in simulation.

Read More

Feb 2, 2026

Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors

We design and simulate a "border patrol" device for generating cryptographic evidence of data traffic entering and leaving an AI cluster, while eliminating the specific analog and steganographic side-channels that post-hoc verification can not close. The device eliminates the need for any mutually trusted logic, while still meeting the security needs of the prover and verifier.

Read More

Feb 2, 2026

Markov Chain Lock Watermarking: Provably Secure Authentication for LLM Outputs

We present Markov Chain Lock (MCL) watermarking, a cryptographically secure framework for authenticating LLM outputs. MCL constrains token generation to follow a secret Markov chain over SHA-256 vocabulary partitions. Using doubly stochastic transition matrices, we prove four theoretical guarantees: (1) exponentially decaying false positive rates via Hoeffding bounds, (2) graceful degradation under adversarial modification with closed-form expected scores, (3) information-theoretic security without key access, and (4) bounded quality loss via KL divergence. Experiments on 173 Wikipedia prompts using Llama-3.2-3B demonstrate that the optimal 7-state soft cycle configuration achieves 100\% detection, 0\% FPR, and perplexity 4.20. Robustness testing confirms detection above 96\% even with 30\% word replacement. The framework enables $O(n)$ model-free detection, addressing EU AI Act Article 50 requirements. Code available at \url{https://github.com/ChenghengLi/MCLW}

Read More

Feb 2, 2026

Prototyping an Embedded Off-Switch for AI Compute

This project prototypes an embedded off-switch for AI accelerators. The security block requires periodic cryptographic authorization to operate: the chip generates a nonce, an external authority signs it, and the chip verifies the signature before granting time-limited permission. Without valid authorization, outputs are gated to zero. The design was implemented in HardCaml and validated in simulation.

Read More

This work was done during one weekend by research workshop participants and does not represent the work of Apart Research.
This work was done during one weekend by research workshop participants and does not represent the work of Apart Research.